FIG. 1 is a block diagram illustrating a portion of an exemplary information processing apparatus. The information processing apparatus illustrated in FIG. 1 is a so-called multiprocessor system.
A sever chassis (SC) 1 forming a multiprocessor system includes a clock board (CB) 2, multiple system boards (SBs) 3-1 to 3-4, and a crossbar switch (XB) 4. The CB 2 includes a clock source 21 generating a clock (or clock signal) and a clock driver (CLK-DV) 22 distributing the clock. Each of the SBs 3-1 to 3-4 includes a clock driver (CLK-DV) 31, a CPU 32, application specific integrated circuits (ASICs) 35 which forms a chip set, and a north-bridge (NB) 33.
The CLK-DV 22 distributes and supplies the clock to the SBs 3-1 to 3-4 and the XB 4. The CLK-DV 31 in each of the SBs 3-1 to 3-4 distributes and supplies the clock to the CPU 32, the ASICs 35, and the NB 33 in the SB. The CPU 32 in each of the SBs 3-1 to 3-4 is connected to the CPU 32 in another SB through the NB 33 in that SB and the XB 4. For purposes of illustration, FIG. 1 depicts the information processing apparatus partitioned into two partitions: Partition P1 formed by the SBs 3-1 and 3-2 and partition P2 formed by the SBs 3-3 and 3-4.
Since the XB 4 in the multiprocessor system in FIG. 1 is shared by the SBs 3-1 to 3-4 independently of partitions P1 and P2, the NB 33 in each of the SBs 3-1 to 3-4 needs to be synchronized with the XB 4 by a clock. For that purpose, the single CB 2, specifically the single clock source 21, supplies a single clock to the SBs 3-1 to 3-4 and the XB 4. Since only the single clock source 21 is used, a failure of the clock source 21 results in a failure of the entire multiprocessor system, including both partitions P1 and P2.
Duplexed clock supply systems have been proposed in which a clock from a single clock source is duplicated and distributed to two channels (see Japanese Laid-Open Patent Publication No. 5-244132, for example). However, if the clock source fails, the entire system fails, including the both partitions P1 and P2.
In a multiprocessor system using a partitioned cluster, if one of the partitions that form the cluster fails, the other partition takes over the task of the failed partition. However, if the partitions fail at the same time due to a failure of the clock source, the entire system fails.    [Patent Document 1] Japanese Laid-open Patent Publication No. 5-244132
The conventional clock supply methods have a problem that a failure of a clock source results in a failure of the entire system.
An object of the present invention is to provide a clock supply method and an information processing apparatus capable of minimizing the probability of the entire system failing due to a failure of a clock source.